The present invention relates to a structure for attaching devices to multi-layer electronic structures, such as circuit boards and cards. The invention also relates to methods for forming multi-layer electronic structures and to attaching electronic devices, such as integrated semi-conductor chips to multi-layer electronic structures.
Multi-layer electronic structures such as circuit boards, circuit cards, chip carriers and other such devices typically are formed from a plurality of electrically conducting and electrically insulating planes. The electrically conducting planes function as ground, signal, and/or power planes and conduct electrical current from an attached electrical device to what ever the multi-layer structure is electrically connected to.
Usually, multi-layer electronic structures include a plurality of mounting sites on one or both surfaces to which a semiconductor chip or other electronic device is attached. Typically, the sites are made of an electrically conducting material and function as ground, power, and/or signal sites. Usually, the pattern of attachment sites on the structure, matches a pattern of power, ground, or signals sites on the attached device. The power, ground and/or signal connecting sites between the multi-layer structure and the chip or other attached device preferably are connected to the plurality of plated through holes formed through the multi-layer structure.
In forming the multi-layer circuit board or card, a plurality of printed circuit cores may first be formed and then joined to form the multi-layer structure. In such a procedure, each core typically is constructed from at least one plane of at least one electrically conducting material surrounded on both sides by a plane of at least one electrically insulating material. A plurality of through holes may then be formed in the electrically insulating and electrically conducting planes. Next, an electrically conducting material may be plated on the surface of the through holes.
In another embodiment, the cores are formed as described above. A plurality of holes are formed through the outer electrically insulating planes but not through the electrically conducting plane. These holes are then filled with an electrically conducting material. Such filled holes are commonly known as mounting or joining studs.
When using either of these methods to form the cores, a plurality of the cores are then stacked on top of each other and aligned so that the plated through holes or joining studs on adjacent cores are aligned. The stack of cores is then subjected to elevated temperatures and pressures so as to cause the electrically insulating material and the electrically conducting material on facing surfaces of adjacent cores or adjoining studs on adjacent cores to be joined together.
The composite multi-layer panel may also be processed by forming contacts for electrically connecting a chip or other device to the panel. Such contact sites may be formed by drilling a plurality of holes in the top surface of the panel and then depositing an electrically conductive material in the holes, similarly to the method described above used for providing mounting between cores of the composite. The filled holes may be electrically connected to the electrically conducting planes of the composite. The ground, signal, and power sites on a chip or other device are then aligned with the sites on the panel and then bonded thereto.
However, as device dimensions have decreased, and the number of mounting sites on chips and circuit boards has increased, the spacing between mounting sites has decreased. This makes it more difficult to join the chips and other devices to multi-layer composites and still provide a solder dam or other means for preventing solder from flowing away from the mounting sites.
The inventors of the present invention recognized the above-discussed problems, among others, and developed the present invention to over come these problems and other short comings of the prior art.
An object of the present invention is to provide a cap structure for attaching to a multi-layer composite electronic structure for providing an improved surface for mounting electronic devices.
An advantage of the present invention is to improve the multi-layer surface for attaching electronic devices to a multi-layer electronic composite enabling greater interconnect density.
In accordance with preferred aspects, the present invention provides a process of forming a multi-layer electronic composite structure. The process includes the step of providing at least one core including at least one plane of at least one electrically conducting material with a plane of at least one electrically insulating material on both sides of the at least one plane of at least one electrically conducting material. The at least one core also includes a plurality of plated through holes formed therethrough. Also according to the process, a pad is provided over at least one of the plated through holes. The pad provides a flat surface for attaching an electronic device and also prevents solder from entering the at least one plated through hole.
According to other preferred aspects, the present invention provides a cap for attaching a chip or other device to a surface of a multi-layer electronic structure. The multi-layer electronic structure includes a plurality of plated through holes formed through it. The cap includes a pad attached over at least one of the plated through holes of the multi-layer electronic structure. The pad includes a flat upper surface for attaching the chip or other device to the multi-layer structure and for sealing the plated through hole to prevent solder from entering the through hole.
According to further preferred aspects, the present invention provides a multi-layer electronic structure including at least one core including at least one plane of at least one electrically conducting material having a plane of at least one electrically insulating material on both sides of the at least one plane of at least one electrically conducting material. The at least one core includes a plurality of plated through holes formed therethrough. The multi-layer electronic structure also includes a pad attached over at least one of the plated through holes.